A research group led by Prof. Cheng Lin from the School of Microelectronics at the University of Science and Technology of China has made significant achievements in the field of fully integrated isolated power chip design. The research group proposed a power supply chip based on a glass fan-out wafer-level package (FOWLP), achieving 46.5 percent peak transformation efficiency and 50 mW/mm2 power density.

Compared with a traditional isolated power supply chip, this new chip design interconnects the receiving and transmitting chips through the microtransformer made of the rewiring layer, showing no need of additional transformer chips. In this way, it lowered the need for three or even four chips in the existing chip design, greatly improving the efficiency of isolated power supply.

The isolated power system package and chip. (Credit: Pan Dongfang)

In addition, the researchers proposed a grid voltage control technology with a variable capacitor, which maintains the grid peak voltage in the best, safest voltage range even in a wider supply voltage range. The design improves the conversion efficiency and power density of the chip effectively, providing a new solution for the design of isolated power chips in the future.

This work was published at IEEE International Solid State Circuits Conference (ISSCC) and selected as demo demonstration at the meeting. 1


  1. D. Pan et al., “33.5 A 1.25W 46.5%-Peak-Efficiency Transformer-in-Package Isolated DC-DC Converter Using Glass-Based Fan-Out Wafer-Level Packaging Achieving 50mW/mm2 Power Density, ” 2021 IEEE International Solid-State Circuits Conference (ISSCC), 2021, pp. 468-470, doi: 10.1109/ISSCC42613.2021.9365955.

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